Solder point of collector or cathode tab. Mounted on a ceramic printed-circuit board single-sided copper tinplated standard footprint.
Device mounted on a FR4 printed-circuit board single-sided copper tinplated mounting pads for collector and cathode both 1 cm2. Device mounted on a FR4 printed-circuit board single-sided copper tinplated standard footprint for SOT457. UNIT PNP transistor VCBO collector-base voltage open emitter − −40 VCEO collector-emitter voltage open base − −40 V VEBO emitter-base voltage open collector − −5 V IC collector current (DC) note 1 − −0.75 A note 2 − −1 A note 3 − −1.3 A Ts ≤ 55 ☌ note 4 − −2 A V ICM peak collector current − −3 A IBM peak base current − −1 A Ptot total power dissipation Tamb ≤ 25 ☌ note 1 − 295 mW Tamb ≤ 25 ☌ note 2 − 400 mW Tamb ≤ 25 ☌ note 3 − 500 mW Ts ≤ 55 ☌ note 4 − 1000 mW − 150 ☌ − 20 V Tj junction temperature Schottky barrier diode VR continuous reverse voltage IF continuous forward current − 1 A IFSM non-repetitive peak forward current t = 8.3 ms half sinewave JEDEC method − 5 A Ptot total power dissipation Tamb ≤ 25 ☌ note 1 − 295 mW Tamb ≤ 25 ☌ note 2 − 400 mW Tamb ≤ 25 ☌ note 3 − 500 mW Ts ≤ 55 ☌ note 4 − 1000 mW note 2 − 150 ☌ Tamb = 25 ☌ note 2 − 600 mW −65 +150 ☌ −65 +150 ☌ Tj junction temperature Combined device Ptot total power dissipation Tstg storage temperature Tamb operating ambient temperature note 2 Notes 1. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME PMEM4020PD 2003 Nov 24 − DESCRIPTION plastic surface mounted package 6 leads 2 VERSION SOT457 Philips Semiconductors Product specification PNP transistor/Schottky-diode module PMEM4020PD LIMITING VALUES In accordance with the Absolute Maximum System (IEC 60134). DESCRIPTION Combination of a PNP transistor with low VCEsat and high current capability and a planar Schottky barrier diode with an integrated guard ring for stress protection in a SOT457 (SC-74) small plastic package. Fig.1 Simplified outline (SOT457) and symbol.
Low collector-emitter saturation voltage.
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